Editorial notes: This base document is intended to encompass all the technical content of the existing standard ANSI/IEEE Std 754-1985, with no changes except those required for HTML formatting (in particular note that the multiplication symbol × and the infinity symbol ∞ may not render correctly in all browsers and printers), and correction of obvious spelling and punctuation errors. Please bring any suspected remaining cases of the latter to the attention of the 754R working group at stds-754@ieee.org.
Copyright 1985 by The Institute of Electrical and Electronics Engineers, Inc 345 East 47th Street, New York, NY 10017, USA No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission of the publisher.
(This Foreword is not a part of ANSI/IEEE Std 754-1985, IEEE Standard for Binary Floating-Point Arithmetic.)
This standard is a product of the Floating-Point Working Group of the Microprocessor Standards Subcommittee of the Standards Committee of the IEEE Computer Society. This work was sponsored by the Technical Committee on Microprocessors and Minicomputers. Draft 8.0 of this standard was published to solicit public comments[f1]. Implementation techniques can be found in An Implementation Guide to a Proposed Standard for Floating-Point Arithmetic by Jerome T. Coonen [f2], which was based on a still earlier draft of the proposal.
This standard defines a family of commercially feasible ways for new systems to perform binary floating-point arithmetic. The issues of retrofitting were not considered. Among the desiderata that guided the formulation of this standard were
[f1] Computer Magazine vol 14, no 3, March 1981. [f2] Computer Magazine vol 13, no 1, January 1980.
It is intended that an implementation of a floating-point system conforming to this standard can be realized entirely in software, entirely in hardware, or in any combination of software and hardware. It is the environment the programmer or user of the system sees that conforms or fails to conform to this standard. Hardware components that require software support to conform shall not be said to conform apart from such software.
This standard specifies
This standard does not specify
The sum of the exponent and a constant (bias) chosen to make the biased exponent's range nonnegative.
A bit-string characterized by three components: a sign, a signed exponent, and a significand. Its numerical value, if any, is the signed product of its significand and two raised to the power of its exponent. In this standard a bit-string is not always distinguished from a number it may represent.
A nonzero floating-point number whose exponent has a reserved value, usually the format's minimum, and whose explicit or implicit leading significand bit is zero.
The location for the result of a binary or unary operation. A destination may be either explicitly designated by the user or implicitly supplied by the system (for example, intermediate results in subexpressions or arguments for procedures). Some languages place the results of intermediate calculations in destinations beyond the user's control. Nonetheless, this standard defines the result of an operation in terms of that destination's format and the operands' values.
The component of a binary floating-point number that normally signifies the integer power to which two is raised in determining the value of the represented number. Occasionally the exponent is called the signed or unbiased exponent.
The field of the significand that lies to the right of its implied binary point.
A variable that a user may set, sense, save, and restore to control the execution of subsequent arithmetic operations. The default mode is the mode that a program can assume to be in effect unless an explicitly contrary statement is included in either the program or its specification. The following mode shall be implemented: rounding, to control the direction of rounding errors. In certain implementations, rounding precision may be required, to shorten the precision of results.
The implementor may, at his option, implement the following modes: traps disabled/enabled, to handle exceptions.
Not a number, a symbolic entity encoded in floating-point format. There are two types of NaNs (6.2). Signaling NaNs signal the invalid operation exception (7.1) whenever they appear as operands. Quiet NaNs propagate through almost every arithmetic ration without signaling exceptions.
The bit string (usually representing a number) that is delivered to the destination.
The component of a binary floating-point number that consists of an explicit or implicit leading bit to the left of its implied binary point and a fraction field to the right.
The use of the word shall signifies that which is obligatory in any conforming implementation.
The use of the word should signifies that which is strongly recommended as being in keeping with the intent of the standard, although architectural or other constraints beyond the scope of this standard may on occasion render the recommendations impractical.
A variable that may take two states, set and clear. A user may clear a flag, copy it, or restore it to a previous state. When set, a status flag may contain additional system-dependent information, possibly inaccessible to some users. The operations of this standard may as a side effect set some of the following flags: inexact result, underflow, overflow, divide by zero, and invalid operation.
Any person, hardware, or program not itself specified by this standard, having access to and controlling those operations of the programming environment specified in this standard.
This standard defines four floating-point formats in two groups, basic and extended, each having two widths, single and double. The standard levels of implementation are distinguished by the combinations of formats supported.
This section concerns only the numerical values representable within a format, not the encodings. The only values representable in a chosen format are those specified by way of the following three integer parameters:
Each format's parameters are given in Table 1. Within each format only the following entities shall be provided:
Numbers of the form
where
Two infinities, +∞ and -∞
At least one signaling NaN
At least one quiet NaN
The foregoing description enumerates some values redundantly, for example, 20 (1.0) = 21 (0.1) = 22 (0.0 1) = ... . However, the encodings of such nonzero values may be redundant only in extended formats (3.3). The nonzero values of the form ± 2Emin (0 . b1 b2 ... bp-1 ) are called denormalized. Reserved exponents may be used to encode NaNs, ±∞, ±0, and denormalized numbers. For any variable that has the value zero, the sign bit s provides an extra bit of information. Although all formats have distinct representations for +0 and -0, the signs are significant in some circumstances, such as division by zero, and not in others. In this standard, 0 and ∞ are written without a sign when the sign is not important.
| Parameter | Format | |||
|---|---|---|---|---|
| Single | Single Extended | Double | Double Extended | |
| p | 24 | >= 32 | 53 | >= 64 |
| Emax | +127 | >= +1023 | +1023 | >= +16383 |
| Emin | -126 | <= -1022 | -1022 | <= -16382 |
| Exponent bias | +127 | unspecified | +1023 | unspecified |
| Exponent width in bits | 8 | >= 11 | 11 | >= 15 |
| Format width in bits | 32 | >= 43 | 64 | >= 79 |
Numbers in the single and double formats are composed of the following three fields:
The range of the unbiased exponent E shall include every integer between two values Emin and Emax, inclusive, and also two other reserved values Emin - 1 to encode ± 0 and denormalized numbers, and Emax + 1 to encode ±∞ and NaNs. The foregoing parameters are given in Table 1. Each nonzero numerical value has just one encoding. The fields are interpreted as follows:
A 32-bit single format number X is divided as shown in Fig 1. The value v of X is inferred from its constituent fields thus
A 64-bit double format number X is divided as shown in Fig 2. The value v of X is inferred from its constituent fields thus
msb means most significant bit
lsb means least significant bit
1 8 23 ... widths
+-+-------+-----------------------+
|s| e | f |
+-+-------+-----------------------+
msb lsb msb lsb ... order
1 11 52 ... widths
+-+-----------+----------------------------------------------------+
|s| e | f |
+-+-----------+----------------------------------------------------+
msb lsb msb lsb ... order
The single extended and double extended formats encode in an implementation-dependent way the sets of values in 3.1 subject to the constraints of Table 1. This standard allows an implementation to encode some values redundantly, provided that redundancy be transparent to the user in the following sense: an implementation either shall encode every nonzero value uniquely or it shall not distinguish redundant encodings of nonzero values. An implementation may also reserve some bit strings for purposes beyond the scope of this standard. When such a reserved bit string occurs as an operand the result is not specified by this standard.
An implementation of this standard is not required to provide (and the user should not assume) that single extended have greater range than double.
All implementations conforming to this standard shall support the single format. Implementations should support the extended format corresponding to the widest basic format supported, and need not support any other extended format. [1]
Rounding takes a number regarded as infinitely precise and, if necessary, modifies it to fit in the destination's format while signaling the inexact exception (7.5). Except for binary <-> decimal conversion (whose weaker conditions are specified in 5.6), every operation specified in Section 5 shall be performed as if it first produced an intermediate result correct to infinite precision and with unbounded range, and then rounded that result according to one of the modes in this section.
The rounding modes affect all arithmetic operations except comparison and remainder. The rounding modes may affect the signs of zero sums (6.3), and do affect the thresholds beyond which overflow (7.3) and underflow (7.4) may be signaled.
An implementation of this standard shall provide round to nearest as the default rounding mode. In this mode the representable value nearest to the infinitely precise result shall be delivered; if the two nearest representable values are equally near, the one with its least significant bit zero shall be delivered. However, an infinitely precise result with magnitude at least 2Emax (2 - 2-p ) shall round to ∞ with no change in sign; here Emax and p are determined by the destination format (see Section 3) unless overridden by a rounding precision mode (4.3).
An implementation shall also provide three user-selectable directed rounding modes: round toward +∞, round toward -∞, and round toward 0.
When rounding toward +∞ the result shall be the format's value (possibly +∞) closest to and no less than the infinitely precise result. When rounding toward -∞ the result shall be the format's value (possibly -∞) closest to and no greater than the infinitely precise result. When rounding toward 0 the result shall be the format's value closest to and no greater in magnitude than the infinitely precise result.
Normally, a result is rounded to the precision of its destination. However, some systems deliver results only to double or extended destinations. On such a system the user, which may be a high-level language compiler, shall be able to specify that a result be rounded instead to single precision, though it may be stored in the double or extended format with its wider exponent range. [2] Similarly, a system that delivers results only to double extended destinations shall permit the user to specify rounding to single or double precision. Note that to meet the specifications in 4.1, the result cannot suffer more than one rounding error.
All conforming implementations of this standard shall provide operations to add, subtract, multiply, divide, extract the square root, find the remainder, round to integer in floating-point format, convert between different floating-point formats, convert between floating-point and integer formats, convert binary <-> decimal, and compare. Whether copying without change of format is considered an operation is an implementation option. Except for binary <-> decimal conversion, each of the operations shall be performed as if it first produced an intermediate result correct to infinite precision and with unbounded range, and then coerced this intermediate result to fit in the destination's format (see Sections 4 and 7). Section 6 augments the following specifications to cover ±0, ±∞, and NaN; Section 7 enumerates exceptions caused by exceptional operands and exceptional results.
An implementation shall provide the add, subtract, multiply, divide, and remainder operations for any two operands of the same format, for each supported format it should also provide the operations for operands of differing formats. The destination format (regardless of the rounding precision control of 4.3) shall be at least as wide as the wider operand's format. All results shall be rounded as specified in Section 4.
When y != 0 , the remainder r = x REM y is defined regardless of the rounding mode by the mathematical relation r = x - y × n , where n is the integer nearest the exact value x/y ; whenever |n - x/y| = ½ , then n is even. Thus, the remainder is always exact. If r = 0 , its sign shall be that of x. Precision control (4.3) shall not apply to the remainder operation.
The square root operation shall be provided in all supported formats. The result is defined and has a positive sign for all operands >= 0, except that sqrt(-0) shall be -0. The destination format shall be at least as wide as the operand's. The result shall be rounded as specified in Section 4.
It shall be possible to convert floating-point numbers between all supported formats. If the conversion is to a narrower precision, the result shall be rounded as specified in Section 4. Conversion to a wider precision is exact.
It shall be possible to convert between all supported floating-point formats and all supported integer formats. Conversion to integer shall be effected by rounding as specified in Section 4. Conversions between floating-point integers and integer formats shall be exact unless an exception arises as specified in 7.1.
It shall be possible to round a floating-point number to an integral valued floating-point number in the same format. The rounding shall be as specified in Section 4, with the understanding that when rounding to nearest, if the difference between the unrounded operand and the rounded result is exactly one half, the rounded result is even.
Conversion between decimal strings in at least one format and binary floating-point numbers in all supported basic formats shall be provided for numbers throughout the ranges specified in Table 2. The integers M and N in Tables 2 and 3 are such that the decimal strings have values ±M × 10±N . On input, trailing zeros shall be appended to or stripped from M (up to the limits specified in Table 2) so as to minimize N. When the destination is a decimal string, its least significant digit should be located by format specifications for purposes of rounding.
When the integer M lies outside the range specified in Tables 2 and 3, that is, when M >= 109 for single or 1017 for double , the implementor may, at his option, alter all significant digits after the ninth for single and seventeenth for double to other decimal digits, typically 0.
| Format | Decimal to Binary | Binary to Decimal | ||
|---|---|---|---|---|
| Max M | Max N | Max M | Max N | |
| Single | 109-1 | 99 | 109-1 | 53 |
| Double | 1017-1 | 999 | 1017-1 | 340 |
Conversions shall be correctly rounded as specified in Section 4 for operands lying within the ranges specified in Table 3. Otherwise, for rounding to nearest, the error in the converted result shall not exceed by more than 0.47 units in the destination's least significant digit the error that is incurred by the rounding specifications of Section 4, provided that exponent over/underflow does not occur. In the directed rounding modes the error shall have the correct sign and shall not exceed 1.47 units in the last place.
Conversions shall be monotonic, that is, increasing the value of a binary floating-point number shall not decrease its value when converted to a decimal string; and increasing the value of a decimal string shall not decrease its value when converted to a binary floating-point number.
When rounding to nearest, conversion from binary to decimal and back to binary shall be the identity as long as the decimal string is carried to the maximum precision specified in Table 2, namely, 9 digits for single and 17 digits for double. [3]
If decimal to binary conversion over/underflows, the response is as specified in Section 7. Over/underflow, NaNs, and infinities encountered during binary to decimal conversion should be indicated to the user by appropriate strings. NaNs encoded in decimal strings are not specified in this standard.
To avoid inconsistencies, the procedures used for binary <-> decimal conversion should give the same results regardless of whether the conversion is performed during language translation (interpretation, compilation, or assembly) or during program execution (run-time and interactive input/output).
| Format | Decimal to Binary | Binary to Decimal | ||
|---|---|---|---|---|
| Max M | Max N | Max M | Max N | |
| Single | 109 - 1 | 13 | 109 - 1 | 13 |
| Double | 1017-1 | 27 | 1017-1 | 27 |
It shall be possible to compare floating-point numbers in all supported formats, even if the operands' formats differ. Comparisons are exact and never overflow nor underflow. Four mutually exclusive relations are possible: less than, equal, greater than, and unordered. The last case arises when at least one operand is NaN. Every NaN shall compare unordered with everything, including itself. Comparisons shall ignore the sign of zero (so +0 = -0).
The result of a comparison shall be delivered in one of two ways at the implementor's option: either as a condition code identifying one of the four relations listed above, or as a true-false response to a predicate that names the specific comparison desired. In addition to the true-false response, an invalid operation exception (7.1) shall be signaled when, as indicated in Table 4, last column, unordered operands are compared using one of the predicates involving < or > but not ? (Here the symbol ? signifies unordered).
Table 4 exhibits the twenty-six functionally distinct useful predicates named, in the first column, using three notations: ad hoc, FORTRAN-like, and mathematical. It shows how they are obtained from the four condition codes and tells which predicates cause an invalid operation exception when the relation is unordered. The entries T and F indicate whether the predicate is true or false when the respective relation holds.
Note that predicates come in pairs, each a logical negation of the other; applying a prefix such as NOT to negate a predicate in Table 4 reverses the true/false sense of its associated entries, but leaves the last column's entry unchanged. [4]
Implementations that provide predicates shall provide the first six predicates in Table 4 and should provide the seventh, and a means of logically negating predicates.
Infinity arithmetic shall be construed as the limiting case of real arithmetic with operands of arbitrarily large magnitude, when such a limit exists. Infinities shall be interpreted in the affine sense, that is, -∞ < (every finite number) < +∞.
Arithmetic on ∞ is always exact and therefore shall signal no exceptions, except for the invalid operations specified for ∞ in 7.1. The exceptions that do pertain to ∞ are signaled only when
Two different kinds of NaN, signaling and quiet, shall be supported in all operations. Signaling NaNs afford values for uninitialized variables and arithmetic-like enhancements (such as complex-affine infinities or extremely wide range) that are not the subject of the standard. Quiet NaNs should, by means left to the implementor's discretion, afford retrospective diagnostic information inherited from invalid or unavailable data and results. Propagation of the diagnostic information requires that information contained in the NaNs be preserved through arithmetic operations and floating-point format conversions.
Signaling NaNs shall be reserved operands that signal the invalid operation exception (7.1) for every operation listed in Section 5. Whether copying a signaling NaN without a change of format signals the invalid operation exception is the implementor's option.
Every operation involving a signaling NaN or invalid operation (7.1) shall, if no trap occurs and if a floating-point result is to be delivered, deliver a quiet NaN as its result.
Every operation involving one or two input NaNs, none of them signaling, shall signal no exception but, if a floating-point result is to be delivered, shall deliver as its result a quiet NaN, which should be one of the input NaNs. Note that format conversions might be unable to deliver the same NaN. Quiet NaNs do have effects similar to signaling NaNs on operations that do not deliver a floating-point result; these operations, namely comparison and conversion to a format that has no NaNs, are discussed in 5.4, 5.6, 5.7, and 7.1.
This standard does not interpret the sign of an NaN. Otherwise, the sign of a product or quotient is the exclusive or of the operands' signs; the sign of a sum, or of a difference x-y regarded as a sum x+ (-y), differs from at most one of the addends' signs, and the sign of the result of the round floating-point number to integral value operation is the sign of the operand. These rules shall apply even when operands or results are zero or infinite.
When the sum of two operands with opposite signs (or the difference of two operands with like signs) is exactly zero, the sign of that sum (or difference) shall be + in all rounding modes except round toward -∞, in which mode that sign shall be -. However, x+x = x-(-x) retains the same sign as x even when x is zero.
Except that sqrt(-0) shall be -0, every valid square root shall have a positive sign.
There are five types of exceptions that shall be signaled when detected. The signal entails setting a status flag, taking a trap, or possibly doing both. With each exception should be associated a trap under user control, as specified in Section 8. The default response to an exception shall be to proceed without a trap. This standard specifies results to be delivered in both trapping and nontrapping situations. In some cases, the result is different if a trap is enabled.
For each type of exception the implementation shall provide a status flag that shall be set on any occurrence of the corresponding exception when no corresponding trap occurs. It shall be reset only at the user's request. The user shall be able to test and to alter the status flags individually, and should further be able to save and restore all five at one time.
The only exceptions that can coincide are inexact with overflow and inexact with underflow.
The invalid operation exception is signaled if an operand is invalid for the operation to be performed. The result, when the exception occurs without a trap, shall be a quiet NaN (6.2) provided the destination has a floating-point format. The invalid operations are
If the divisor is zero and the dividend is a finite nonzero number, then the division by zero exception shall be signaled. The result, when no trap occurs, shall be a correctly signed ∞ (6.3).
The overflow exception shall be signaled whenever the destination format's largest finite number is exceeded in magnitude by what would have been the rounded floating-point result (Section 4) were the exponent range unbounded. The result, when no trap occurs, shall be determined by the rounding mode and the sign of the intermediate result as follows:
Trapped overflows on all operations except conversions shall deliver to the trap handler the result obtained by dividing the infinitely precise result by 2α and then rounding. The bias adjust α is 192 in the single, 1536 in the double, and 3 × 2n-2 in the extended format, when n is the number of bits in the exponent field. [5] Trapped overflow on conversion from a binary floating-point format shall deliver to the trap handler a result in that or a wider format, possibly with the exponent bias adjusted, but rounded to the destination's precision. Trapped overflow on decimal to binary conversion shall deliver to the trap handler a result in the widest supported format, possibly with the exponent bias adjusted, but rounded to the destination's precision; when the result lies too far outside the range for the bias to be adjusted, a quiet NaN shall be delivered instead.
Two correlated events contribute to underflow. One is the creation of a tiny nonzero result between ±2Emin which, because it is so tiny, may cause some other exception later such as overflow upon division. The other is extraordinary loss of accuracy during the approximation of such tiny numbers by denormalized numbers. The implementor may choose how these events are detected, but shall detect these events in the same way for all operations. Tininess may be detected either
Loss of accuracy may be detected as either
When an underflow trap is not implemented, or is not enabled (the default case), underflow shall be signaled (by way of the underflow flag) only when both tininess and loss of accuracy have been detected. The method for detecting tininess and loss of accuracy does not affect the delivered result which might be zero, denormalized, or ±2Emin. When an underflow trap has been implemented and is enabled, underflow shall be signaled when tininess is detected regardless of loss of accuracy. Trapped underflows on all operations except conversion shall deliver to the trap handler the result obtained by multiplying the infinitely precise result by 2α and then rounding. The bias adjust α is 192 in the single, 1536 in the double, and 3 × 2n-2 in the extended format, where n is the number of bits in the exponent field. [6] Trapped underflows on conversion shall be handled analogously to the handling of overflows on conversion.
If the rounded result of an operation is not exact or if it overflows without an overflow trap, then the inexact exception shall be signaled. The rounded or overflowed result shall be delivered to the destination or, if an inexact trap occurs, to the trap handler.
A user should be able to request a trap on any of the five exceptions by specifying a handler for it. He should be able to request that an existing handler be disabled, saved, or restored. He should also be able to determine whether a specific trap handler for a designated exception has been enabled. When an exception whose trap is disabled is signaled, it shall be handled in the manner specified in Section 7. When an exception whose trap is enabled is signaled the execution of the program in which the exception occurred shall be suspended, the trap handler previously specified by the user shall be activated, and a result, if specified in Section 7, shall be delivered to it.
A trap handler should have the capabilities of a subroutine that can return a value to be used in lieu of the exceptional operation's result; this result is undefined unless delivered by the trap handler. Similarly, the flag(s) corresponding to the exceptions being signaled with their associated traps enabled may be undefined unless set or reset by the trap handler.
When a system traps, the trap handler should be able to determine
If enabled, the overflow and underflow traps take precedence over a separate inexact trap.
(Informative)
(This Appendix is not a part of ANSI/IEEE Std 754-1985, IEEE Standard for Binary Floating-Point Arithmetic.)
The following functions and predicates are recommended as aids to program portability across different systems, perhaps performing arithmetic very differently. They are described generically, that is, the types of the operands and results are inherent in the operands. Languages that require explicit typing will have corresponding families of functions and predicates.
Some functions, such as the copy operation y := x without change of format, may at the implementor's option be treated as nonarithmetic operations which do not signal the invalid operation exception for signaling NaNs; the functions in question are (1), (2), (6), and (7).
[1] Only if upward compatibility and speed are important issues should a system supporting the double extended format also support single extended.
[2] Control of rounding precision is intended to allow systems whose destinations are always double or extended to mimic, in the absence of over/underflow, the precision of systems with single and double destinations. An implementation should not provide operations that combine double or extended operands to produce a single result, nor operations that combine double extended operands to produce a double result, with only one rounding.
[3] The properties specified for conversions are implied by error bounds that depend on the format (single or double) and the number of decimal digits involved; the 0.47 mentioned is a worst-case bound only. For a detailed discussion of these error bounds and economical conversion algorithms that exploit the extended format, see COONEN, JEROME T. Contributions to a Proposed Standard for Binary Floating-Point Arithmetic. Ph.D. Thesis, University of California, Berkeley, CA, 1984.
[4] There may appear to be two ways to write the logcal negation of a predicate, one using NOT explicitly and the other reversing the relational operator. For example, the logical negation of (X = Y) may be written either NOT(X = Y) or (X ?<> Y); in this case both expressions are functionally equivalent to (X != Y). However, this coincidence does not occur for the other predicates. For example, the logical negation of (X < Y) is just NOT(X < Y); the reversed predicate (X ?>= Y) is different in that it does not signal an invalid operation exception when X and Y are unordered.
[5] The bias adjust is chosen to translate over/underflowed values as nearly as possible to the middle of the exponent range so that, if desired, they can be used in subsequent scaled operations with less risk of causing further exceptions.
[6] Note that a system whose underlying hardware always traps on underflow, producing a rounded, bias-adjusted result, shall indicate whether such a result is rounded up in magnitude in order that the correctly denormalized result may be produced in system software when the user underflow trap is disabled.
Copyright 1985 by The Institute of Electrical and Electronics Engineers, Inc 345 East 47th Street, New York, NY 10017, USA No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission of the publisher.